Beckhoff EtherCAT Registers Section II Instrukcja Użytkownika Pobierz pdf (Strona 45)

PDI Configuration (0x0150:0x0153)

Slave Controller – Register Description II-33

Table 40: Register PDI Synchronous Microcontroller extended Configuration (0x0152:0x0153)

ESC20

ET1100

ET1200

IP Core

[7:0]

Bit

Description

ECAT

PDI

Reset Value

7:0

Reserved, set EEPROM value 0

r/-

0, later EEPROM ADR

0x0003

Write data valid:

0: Write data valid one clock cycle after CS

1: Write data valid together with CS

r/-

Read mode:

0: Use Byte Selects for read accesses

1: Ignore Byte Selects for read accesses,

always read full PDI width

r/-

CS mode:

0: Sample CS with rising edge of

CPU_CLK

1: Sample CS with falling edge of

CPU_CLK

r/-

TA/IRQ mode:

0: Update TA/IRQ with rising edge of

CPU_CLK

1: Update TA/IRQ with falling edge of

CPU_CLK

r/-

15:12

Reserved, set EEPROM value 0

r/-

1 2 ... 40 41 42 43 44 45 46 47 48 49 50 ... 97 98

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Beckhoff EtherCAT Registers Section II Instrukcja Użytkownika Strona 45